Muller C-element as majority gate for self-correcting triple modular redundant logic

Description

Technology scaling has increased the susceptibility of integrated circuits (ICs) to experience an incorrect signal (soft error). Triple modular redundancy (TMR) is a type of code that sends a message through a circuit three times in order to determine the most probabilistic value and hence, mitigate soft error. Circuits using TMR logic in aerospace applications do not impede performance, but adversely impact power and area. In contrast, circuits operating non-redundantly have performance, power, and reliability constraints. Therefore, scientists are now looking to design a configurable circuit with reduced size, area, and power consumption without affecting performance.

Researchers at ASU have developed two circuit designs for self-correcting triple modular redundancy (TMR) logic with reduced size and ability to support non-redundant operating modes. The first design essentially replaces one of the circuit’s logic gates with three Muller C-element circuit blocks, circuits that give an output value only when a signal uniformly changes the inputs. The C-element configuration works with the overall feedback system of the circuit to provide a reliable output signal and subsequently eliminates the need for four logic gates, saving area and simplifying the overall design. The resulting circuit supports independent domain testing for either multiple parallel threads or a single thread which uses about 33% of the TMR mode power. In summary, scientists developed two low-area and low-power circuit designs for voting feedback in TMR self-correcting latches and flip-flops.

Potential Applications

  • Spacecraft, Satellite, and Nuclear Reactor Electronic Components
  • Integrated Circuit CAD Software
  • Radiation Hardened Digital Circuits

Benefits and Advantages

  • Configurability – The design supports independent testing and non-redundant operation modes, permitting increased power savings or increased performance
  • Lower Cost – The circuit’s savings in area allow support of a non-redundant operating mode, generating savings in power
  • Practical – The circuit design can extend to self-correcting pulse-clocked latch designs as well as non-self-correcting designs like forward path voting

For more information about the inventor(s) and their research, please see:

Dr. Lawrence Clark's directory webpage

Case ID:
M16-021P
Published:
06-27-2016
Last Updated:
05-10-2018

Patent Information

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