Optimized Subspace-Based Approach to Synchrophasor Estimation
Monitoring a power system involves not only measuring the fundamental 60 Hz signal, but additional harmonics (120 Hz, 180 Hz, 240 Hz, etc.) as well as clutter signals unassociated with any power frequency or harmonic. These clutter signals make it difficult to accurately estimate the magnitude, phase, and frequency of the fundamental signal, which are needed in many control applications.
Researchers at Arizona State University have developed an improved subspace-based phasor measurement unit (PMU) algorithm based on ESPRIT frequency estimation. The first innovation is a dynamic, real-time thresholding method to determine the size of the signal subspace. This allows for accurate ESPRIT-based frequency estimates of the nominal system frequency as well as the frequencies of any out-of-band interference or harmonic frequencies. Since other frequencies are included in the least squares (LS) estimate, the interference from frequencies other than nominal can be excluded. This results in a near flat estimation error over changes in (a) nominal system frequency, (b) harmonic distortion, and (c) out-of-band interference. The second innovation is the reduction in computational burden of the ESPRIT algorithm. This innovation enabled running the algorithm in real time on resource-constrained platforms. The accuracy of this algorithm has been evaluated using the IEEE standard for synchrophasor estimation, IEC/IEEE 60255-118-1, and compared to another state-of-the-art PMU algorithm.
• Phasor measurement units (PMUs)
• Power system monitoring
• Mobile power grids / microgrids
• Power grid automation / smart power grids
Benefits and Advantages
• Uses a combination of harmonic-mean and intelligent signal merging to correctly identify signal subspace without a priori knowledge of system noise level
• Dynamic thresholding allows signal subspace determination in changing noise environments
• Does not require high sampling rates for accurate estimation, unlike competing methods such as iterative interpolated DFT (i-IpDFT)
• Suitable for lower-cost and lower-power-consumption hardware
Related Publication: An Optimized Subspace-Based Approach to Synchrophasor Estimation