Regrown p-GaN by Metalorganic Chemical Vapor Deposition (MOCVD) for GaN Vertical-Channel Junction Field-Effect Transistors (VCJFETs)
GaN-based power electronics has been under extensive research due to GaN’s large bandgap, high breakdown electric field (Eb), and large Baliga’s figure of merit (BFOM). With the availability of high-quality bulk GaN substrates, GaN vertical devices have become prominent candidates for next-generation power applications, capable of achieving high currents and high breakdown voltage (BV) without enlarging the device area. Researchers have demonstrated the metal-oxide-semiconductor field-effect transistor (MOSFET) and the current aperture vertical electron transistor (CAVET). However, GaN MOSFETs still suffer from low electron mobility in the p-GaN inversion channel and a very large turn-on voltage. On the other hand, CAVET devices face challenges in achieving a normally-off operation mode.
The GaN vertical-channel junction field effect transistor (VCJFET) was proposed as an alternative and has potential to overcome the low channel mobility of MOSFETs while achieving a normally-off operation mode. GaN VCJFETs can be realized by either Mg implantation or selective area regrowth (SAR). However, ion implantation in III-nitride materials, especially for p-type doping, has been a significant challenge due to the very low activation rate and the high annealing temperatures that can decompose GaN. On the other hand, GaN SAR has difficulties with Si diffusion into p-GaN and contamination in the metalorganic chemical vapor deposition (MOCVD) chamber. So far, few experimental results on VCJFETs have been reported and the fabrication process has yet to be optimized.
To fabricate normally-off GaN VCJFETs, researchers at Arizona State University have developed a method for p-GaN regrowth by metalorganic chemical vapor deposition (MOCVD), as well as a self-planarization process. The p-GaN gates were regrown on GaN epilayers with fin-like channels patterned by electron beam lithography (EBL). A maskless blanket regrowth and a subsequent self-planarization process were applied to define the p-GaN gate regions. The resulting GaN VCJFETs achieved an ON/OFF ratio of ∼100 and a transconductance of over 600 S/cm2, which are considerable improvements over previous reports.
• Power electronics
• Power conversion
Benefits and Advantages
• Cost-saving and simple self-planarization process
• Delivers improved ON/OFF ratio and improved transconductance in fabricated GaN VCJFETs
• Versatile process can also be used to fabricate lateral PN junctions and other GaN devices
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CategoriesPhysical Science Advanced Materials/Nanotechnology Semiconductors, Materials & Processes Semiconductor Devices
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- Shen Yan