Researchers at Arizona State University have taken an entirely different approach to realizing a threshold gate. They have developed a first of its kind architecture for a threshold logic gate based on the integration of conventional MOSFETs and a Spin Torque Transfer-Magnetic Tunneling Junction (STT-MTJ) device. The resulting cell, called Spintronic Threshold Logic (STL), is extremely compact, and can be programmed to realize a large number of threshold functions, many of which would require a multilevel network of conventional CMOS logic gates. These researchers invented a novel array architecture consisting of STL cells onto which complex logic networks can be mapped. The resulting array is called a Spintronic Threshold Logic Array (STLA) and has several advantages not available with conventional logic.
- Any company invested in Field Programmable Gate Arrays (FPGA)
Benefits and Advantages
- Non-volatile logic circuit - Will retain the partial results of a computation even when the power is disconnected
- Compact - It resembles the structure and operation of a DRAM, and is very compact
- Fully observable and controllable - The inputs of every STL cell are fully controllable, and its outputs are fully observable, without having to include any scan capability
- Efficient - Zero standby power consumption.
- Reduced Size - Substantial reduction in area, up to 12X fewer transistors than corresponding FPGA