In many industries, certain cyber-physical systems (e.g., hard real-time systems), must meet strict timing requirements. Failure of such systems in fields such as automobiles or aeronautics can result in serious injury, loss of life, or expensive damage to equipment. In these safety-critical system applications, worst-case execution time (WCET) analysis and optimization are of paramount importance. Traditional real-time systems rely on large, on-chip caches for performance optimization. This cache approach is expensive and scales poorly with the size and complexity of the application. The use of scratchpad memories (SPMs) is a promising alternative to the cache approach. SPMs are more time-predictable than caches, and can offer additional improvements in predictability, cost, and scaling. The performance of an SPM system depends primarily upon the management of its direct memory access (DMA), particularly when dealing with programs with larger code sizes. Therefore, there is a need for SPM code management techniques capable of providing high WCET performance.
Researchers at Arizona State University have developed improved function-level code management techniques for SPMs. Code management techniques attempt to allocate SPM space in a manner that minimizes interference between functions. For example, researchers at ASU have developed an optimal region-free mapping technique, which maps a function directly to an SPM address range, decreasing DMA operations and improving WCETs. Improved WCETs allow systems to perform in real-time with greater accuracy and decreased delay. In addition to safety-critical systems, these technologies could potentially provide benefits to computer architectures in a wide range of industries that use cyber-physical systems.
- Real-Time, Safety-Critical Systems
- Automotive (autonomous cars, safety features, critical functions control)
- Other Cyber-Physical Systems
- Control systems
Benefits and Advantages
- Scratchpad technologies offer several improvements over the cache approach
- Improved scaling
- Improved form factor
- Less power consumption
- Less costly
- Region-free mapping – provides significant reductions in WCET
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